Computer systems must be provided with sufficient data storage capacity to operate correctly. This data storage capacity is typically provided as Random Access Memory (RAM), and SDRAM is a common form of RAM.
Accesses to a memory device, such as a SDRAM integrated circuit, are performed by a SDRAM controller. The SDRAM controller is connected to the SDRAM by means of a memory data bus, and the SDRAM controller must operate as far as possible to make efficient use of the bandwidth of the memory bus, in order to maximise the overall rate at which data can be transferred from the memory device.
Access requests received by a SDRAM controller will specify the amount of data to be retrieved from the SDRAM device. Data is received from the SDRAM device in bursts, with each burst containing a fixed amount of data, and occupying the memory bus for a corresponding fixed time period. In the case of a request to read data from the memory device, the access request will also specify whether it is a wrapping read request or an incrementing read request.
In an incrementing read request, the data to be read from the memory device is stored at memory locations in the memory device, with the addresses of those memory locations continually increasing. In a wrapping read request, the data to be read from the memory device is stored at memory locations in the memory device, with the addresses of those memory locations returning to near the start point towards the end of the read operation.
In a conventional system, this has the consequence that only a part of the data returned from the memory device in the first data burst is passed to the requesting device, and that the same data burst is requested again at the end of the read operation to allow the remaining data to be passed to the requesting device.
This results in inefficient usage of the available bandwidth of the memory bus.